1. Field of the Invention
The present invention generally relates to semiconductor devices and, more particularly, to a semiconductor device having more than three kinds of wells in the same substrate and a manufacturing method of such a semiconductor device.
2. Description of the Related Art
A formation process of a well in a semiconductor manufacture process does not only influence an electrical property of a transistor formed in a semiconductor device, but also plays a very important roll to give influences to even a chip area and a manufacturing cost. Although it has been general to form two kinds of wells, N-well and P-well, thus far, a third well different from the N-well and P-well has become used more and more in reflecting the demand for a high-performance device.
A purpose of forming such a third well is: 1) to enable a formation of a high-voltage-withstanding element by forming a well having a small concentration; and 2) to form a triple well structure by forming a well having a deep junction.
A low-concentration well having a conductivity of N-type is referred to as “lightly-N-well”, and a low-concentration well having a conductivity of P-type is referred to as “lightly-P-well”. The lightly-N-well and the lightly-P-well are indispensable for a high-voltage-withstanding element, which operates at a high-voltage range. It should be noted that, in the present specification, a well having N-type conductivity is simply referred to as “N-well” and a well having P-type conductivity is simply referred to as “P-well”.
Moreover, the triple well structure permits mixing of a negative power-supply circuit and is capable of shielding noise, and is also capable of improving a reliability of a dynamic random access memory (DRAM), etc. Thus, the triple well structure is widely used in a digital/analog mixed LSI and a memory mixed LSI, which contributes to the recent popularization of mobile phones and mobile terminals.
The above-mentioned way of thinking can be applied also to a case where the number of kinds of wells is increased to four or five, and a description will be given of the case where three kinds of wells are provided in the same substrate. The three kinds of wells may be “N-well/P-well/Lightly-N-well”, “N-well/P-well/Lightly-P-well”, or “N-well/P-well/triple well”.
There is suggested a method of forming the three kinds of wells as shown in FIG. 1 (refer to Japanese Laid-Open Patent Application No. 61-502993). FIG. 1 is an illustration for explaining the process of forming three kinds of wells, which are the N-well, the P-well and the lightly-N-well, in the same substrate.
As shown in FIG. 1-(A), first a nitride film 1 is deposited on a silicon substrate 10, and a resist pattern 2 is formed according to a photolithography process so as to define an area where a lightly-N-well is formed. Then, a part of the nitride film 1 corresponding to an opening of the resist pattern 2 is removed by etching using the resist patter 2 as a mask, and phosphorous ions 3 are implanted or doped into the substrate 10 using an ion implantation or doping technique.
Thereafter, as shown in FIG. 1-(B), the substrate 10 is heat-treated in an oxidizing atmosphere after removing the resist pattern 2. According to the heat treatment, an oxide film 4 grows in the area where the nitride film 1 is removed, and the phosphorous ions 3 implanted into the silicon substrate 10 is diffused, thereby forming the lightly-N-well (Lightly-NW) 5.
Then, as shown in FIG. 1-(C), a resist pattern 7 is formed according to a photolithography process without removing the nitride film 1 so as to define an area where an N-well is formed.
As shown in FIG. 1-(D), after removing a part of the nitride film 1 corresponding to an opening of the resist pattern 7, phosphorous ions 8 are implanted or doped into the substrate 10 using an ion implantation or doping technique.
Then, as shown in FIG. 1-(E), after removing the resist pattern, the substrate 10 is heat-treated within an oxidizing atmosphere so as to cause an oxide film 2 growing up in the area where the phosphorous ions 8 are implanted or doped. Accordingly, the implanted or doped phosphorous ions 8 are diffused, which forms the N-well (NW) 20. At this time, since the previously formed oxide film 4 is exposed, the oxide film 4 is influenced by the heat treatment for forming the oxide film 9 and turns into an oxide film 4c having a thickness larger than the original film thickness. This lowers the level of the surface of the lightly-N-well 5c. Although the film thickness of the oxide film 4c depends on a condition of the oxidation process, if the condition of the oxidation process to form the oxide film 4 is the same as the condition of the oxidation process to form the oxide film 9, the film thickness of the oxide film 4c is about twice the film thickness of the oxide film 9.
As shown in FIG. 1-(F), after removing the nitride film 1, boron ions 11 are implanted into the substrate 10 using an ion implantation technique. At this time, a selection is made in the ion implantation or doping condition so that the previously formed oxide films 4c and 9 serve as implantation masks. Consequently, areas other than oxide films 4c and 9 are defined as P-wells.
Then, as shown in FIG. 1-(G), the substrate 10 is heat-treated within a nitrogen atmosphere. According to the heat treatment, the boron ions 11 are diffused, which forms the P-wells (PWs) 12. Thereafter, the oxide films 4c and 9 are removed, and the three wells, the lightly-N-well 5c, the N-well 20 and the P-wells 12, are completed.
However, according to the above-mentioned process, the thickness of the oxide film 4c is larger than the thickness of the oxide film 9. Thus, after removing both finally a difference in the level is generated between the P-wells 12 and the lightly-N well 5c, as indicated in a dotted circle 13 in FIG. 13-(G). If the level difference (step) is large, wire-breaking may occurs in wiring of a polysilicon or a metal, which is formed over the step. Additionally, if the level difference exceeds a focal depth in the photolithography, it becomes very difficult to form a device.
In order to decrease such a level difference between the wells, there is suggested a method in which the series of processes, the photolithography process→the ion implantation process→the oxide-film formation process, is performed twice (refer to Japanese Patent Publication No. 2795565). In this method, the second ion implantation is applied to areas outside the area where the first ion implantation is performed, and a thickness of the oxide film formed by the second oxidation is made smaller than a thickness of the oxide film formed by the first oxidation. By doing so, the level difference can be gentle two steps, which prevents the wiring extending over the level difference from being wire-broken. However, this method has a problem in that a device manufacturing process takes a long time since the series of processes, the photolithography process→the ion implantation or doping process→the oxide-film formation process, must be performed twice.